Keysight Helps AttoTude Cut AI Chip Design Cycles by More Than 50%

Keysight Technologies has announced that AttoTude, a developer of advanced ASICs for AI and hyperscale data-centre applications, has expanded its use of Keysight’s electronic design automation (EDA) software across its complete IC design workflow. The collaboration has enabled AttoTude to reduce its chip design cycles by more than 50% and achieve first-pass silicon success across advanced RF, sub-terahertz and terahertz tape-outs.

AttoTude is developing ASICs based on its dielectric-interconnect technology for next-generation AI infrastructure, with designs supporting data rates of 200Gbps, 400Gbps and 800Gbps per lane. As its engineering teams work across increasingly demanding sub-THz and THz systems, accurate electromagnetic simulation and efficient coordination between design stages have become increasingly important. Using Keysight’s Advanced Design System (ADS), the company has reduced its design cycle to less than six weeks while maintaining performance against specifications on first silicon.

The collaboration also incorporates Keysight’s design data management capabilities, giving AttoTude engineers a central source of design information and greater visibility throughout development. System-level planning allows teams to assess design alternatives before committing to fabrication, while linking simulation results with physical measurements helps improve confidence in predicted performance. This becomes particularly important as designs move from conventional RF frequencies towards sub-THz and THz operation, where maintaining consistency between layouts, electromagnetic models and simulation data can be challenging.

AttoTude’s ASIC platform is designed to support signalling frequencies ranging from 100GHz to 3THz, placing significant demands on design accuracy and simulation fidelity. According to Richard Chan, ASIC Architect and Development Leader at AttoTude, Keysight’s EDA environment has helped the company accelerate development while maintaining confidence in first-pass silicon results.

The development reflects the growing importance of faster chip design cycles as semiconductor companies respond to rising demand for AI infrastructure. With AI systems requiring increasingly high-bandwidth and efficient interconnect technologies, reducing design iterations and avoiding costly silicon respins can help companies bring new solutions to market more quickly. Keysight said the AttoTude deployment demonstrates how integrated EDA workflows can support faster movement from initial concepts through to silicon.