TYLsemi Raises US$43 Million to Advance Chiplet Platform for AI Infrastructure

TYLsemi^TM emerged from stealth and announced the closing of an oversubscribed $43 million early-stage funding round to accelerate the development of AI infrastructure. TYLsemi is the first chiplet platform company to deliver a full portfolio across IO, power delivery, and memory paired with a chiplet-based custom silicon design, integration and supply-chain ownership. This standards-based, production-ready portfolio will provide AI infrastructure customers with a faster, lower-risk path for developing AI silicon from architecture to deployment.

The funding round was led by Matter Venture Partners with participation from Viola Ventures, GHOVC, Egis Technology, and strategic investment from leading companies across the global semiconductor and AI infrastructure ecosystem. The company was co-founded by industry leaders Mohit Gupta and Sunil Bhardwaj, who have led and scaled businesses and worldwide engineering and operations teams at Alphawave (acquired by Qualcomm), SiFive, Cadence Design Systems, Rambus, and other leading semiconductor companies.

"The AI accelerator market is on track to reach $604 billion by 2033 and custom silicon XPUs built for specific hyperscaler workloads are the fastest-growing segment," said Mohit Gupta, Founder and CEO of TYLsemi. "At that scale, chiplet-based design is no longer optional, yet there is no pure-play chiplet company serving this market with a full portfolio. TYLsemi closes that gap with standards-based chiplets combined with UCIe-based die-to-die connectivity, XPU-aware design, packaging, and integration — giving customers a fast, proven path to AI-era silicon."

Chiplets are the New Standard for AI Silicon

AI systems are shifting from monolithic chips to distributed, multi-die architectures as chip size approaches physical limits and connectivity and power become bottlenecks. At the same time, advances in packaging technologies are making it possible to integrate multiple dies into a single system. With the emergence of standardized interconnects such as UCIe, chiplet-based design is now practical and scalable. 

"AI infrastructure is undergoing a fundamental shift toward modular, chiplet-based design, but the ecosystem has not kept pace," said Jim Handy, General Director at Objective Analysis. "This represents a significant opportunity for a company such as TYLsemi that can deliver pre-validated, standards-based silicon to accelerate AI infrastructure silicon deployment."

TYLsemi Makes Chiplet-Based AI Systems Practical at Scale

TYLsemi delivers a reusable, production-ready chiplet portfolio that simplifies the design of multi-die AI systems. Customers can use these chiplets as standalone components or as the foundation for full custom silicon solutions based on leading industry foundry and packaging technologies. Below are the first chiplets that TYLsemi will bring to market, with more planned in the future to meet the evolving needs of AI infrastructure customers.

• TYL.IO^TM: Versatile connectivity chiplet product family for AI systems
  Comprehensive family of IO chiplets designed to enable high-bandwidth, standards-based connectivity across high-performance systems supporting PCIe, ESUN, and UALink connectivity, with a co-packaged optics (CPO) roadmap for next-generation rack-scale fabrics.
  
  
• TYL.Power^TM: Intelligent in-package power delivery solution for XPUs
  An integrated voltage regulator (IVR) chiplet that provides efficient and intelligent control and optimised system-level power efficiency
  
  
• TYL.Mem^TM: Versatile memory connectivity product family for AI systems
  A planned product family focused on memory connectivity for advanced AI systems, with additional details to be announced as the roadmap progresses.
  
  
• TYL.Forge^SM: End-to-end chiplet-enabled custom silicon platform
  A full-stack platform for customer-defined XPU, compute, and fabric designs, which TYLsemi implements using its connectivity and power delivery portfolio, plus IP, foundry, packaging, and production readiness.

TYL.IO and TYL.Power chiplet samples will be available to qualified customers in 2027 in partnership with TSMC; TYLsemi is now engaging lead customers for its TYL.Forge platform.

Supporting Quotes

"AI infrastructure is entering an era of rapid scaling, so the ability to develop advanced silicon quickly and efficiently will be a defining advantage," said Wen Hsieh, Founding Managing Partner at Matter Venture Partners. "TYLsemi is building foundational chiplet technologies for custom silicon that will make the design process faster, less risky, and more accessible, unlocking significant value and velocity across the AI ecosystem."

"TYLsemi has built the chiplet platform the entire AI silicon industry needs — one that can serve the scale of a hyperscaler and the speed requirements of an emerging AI company in the same breath," said Zvika Orron, Managing Partner at Viola Ventures. "For the first time, advanced custom silicon development isn't a competitive moat reserved for the largest players; it's a platform."

"TYLsemi's standards-based chiplets democratize chip development for startups and large silicon and system developers at a much lower cost," said Shri Dodani, Founder and Managing Partner at GHOVC. "This enables them to develop multiple chip generations in parallel to deliver custom silicon at a much faster pace."

"As Egis advances Mobius100, our datacenter-grade compute CPU based on a leading compute architecture and 3nm class process technologies, we see chiplet-based IO, memory, and intelligent power delivery as essential building blocks for next-generation AI infrastructure," said Steve Lo, Chairman at Egis Technology. "TYLsemi's standards-based chiplet platform, including IO and IVR chiplets, is highly complementary to our roadmap, and we look forward to exploring opportunities to integrate these technologies into future modular, power-efficient AI infrastructure platforms."