Teradyne Launches Three UltraFLEXplus Instruments for AI Semiconductor Testing

Teradyne, Inc. (NASDAQ: TER), a leading provider of automated test equipment and advanced robotics, announced the launch of three new instruments for its UltraFLEXplus platform, designed to meet the increasingly complex demands of AI and data center semiconductor testing. The UltraPin5000-EM, UltraPort-PCIe6, and UltraVS64-HP instruments are designed to deliver unmatched scalability, flexibility, and performance, empowering semiconductor manufacturers to test advanced devices with maximum efficiency and accuracy. Together, these instruments aim to advance Teradyne's position across the full AI device supply chain, from first wafer probe to final rack validation, ensuring components in an AI data centre meet the quality standards the industry demands.

“As the AI and data centre market drives unprecedented growth in semiconductor complexity, Teradyne remains committed to delivering innovative solutions that enable our customers to stay ahead in this rapidly evolving market,” said Greg Smith, CEO of Teradyne. “This new suite of instruments expands the capabilities of our UltraFLEXplus platform, offering the industry’s most advanced, future-proof solutions for testing cutting-edge devices.”

UltraPin5000-EM

The UltraPin5000-EM is Teradyne's next-generation digital instrument, purpose-built to address the demands of pattern-intensive AI and compute devices. With up to 80 times more vector memory than other market offerings, it enables testing of today’s most complex AI devices while future-proofing for tomorrow’s innovations. Pattern loads are up to 10 times faster, and a new Persistence Mode delivers near-instant reloads, enabling engineering teams to accelerate debug and characterisation while production floors benefit from improved equipment efficiency.

The UltraPin5000-EM delivers excellent signal integrity at 5 Gbps data rates for robust high-bandwidth pattern throughput, while its flexible timing architecture supports independent clock frequencies per pin for seamless adaptation to heterogeneous device requirements. Scan network acceleration compiles per-core results in real time, enabling immediate adaptive test decisions and reducing structural test time without sacrificing coverage. Compatible with the UltraPin2200, the UltraPin5000-EM protects customers' existing investments while scaling to meet new device requirements.

UltraPort-PCIe6

The UltraPort-PCIe6 is the industry's first high-speed I/O protocol ATE solution for PCIe Gen6 interfaces, delivering 64 Gbps (PAM-4) across 32 lanes per instrument. Excellent signal integrity performance, combined with unique per-pin PMU and integrated loopback capability, provides enhanced test coverage, broader diagnostics, and the cleanest signal path to the device, for test solution setups that can be brought up quickly and stay stable in production. A dedicated server-class compute backend scales to 2TB of high-performance memory, executing the largest test data sets at the fastest test times.

The instrument supports both mission-mode testing and high-speed I/O scan, enabling test coverage to shift to earlier insertions to improve Known Good Die confidence, and reduce waste of high-value HBM and advanced packaging assemblies.

UltraVS64-HP

The UltraVS64-HP is Teradyne's most advanced power supply, delivering 1280 amps per instrument, 5120 amps per ganged supply, and total test cell capacity exceeding 15,000 amps. A unique 16V range makes the UltraVS64-HP ready for emerging integrated voltage regulator (IVR) architectures, spanning low-voltage, high-current devices through higher-voltage inputs. This current and voltage headroom lets customers follow advanced packaging roadmaps toward larger, higher-power compute devices - all from a single instrument.

New integrated multi-point sense joins superior dynamic load response to preserve device yields, holding conditions stable as high-current activity shifts across reticle-size die and multi-die packages. Advanced power profiling provides push-button access to deep insights into device behaviour during test, critical for characterising next-generation architectures and for optimising test programs to measured results. A new, dedicated Intelligent power interface brings elements of system-level power management into the test cell and adds fast hardware-level fault response that guards against thermal runaway, and the costly probe card and socket damage it can cause.