AMD Brings UCIe Connectivity to Select Versal Adaptive SoCs for Advanced Chiplet Designs

AMD is expanding the capabilities of its Versal adaptive SoC portfolio by introducing native support for the Universal Chiplet Interconnect Express (UCIe) 1.1 standard. The move will initially apply to selected Versal RF Series devices, enabling high-bandwidth, low-power communication between the adaptive SoCs and specialised chiplets integrated within the same package.

The addition of UCIe reflects the semiconductor industry's growing shift towards chiplet-based architectures, which allow designers to combine specialised silicon components rather than developing increasingly complex monolithic SoCs. By adopting an open interconnect standard, AMD aims to give system designers greater flexibility to integrate chiplets for functions such as RF data conversion, AI acceleration, CPU and GPU processing, security, communications and application-specific workloads.

The Versal RF Series will support up to four independent UCIe-SP interfaces and two UCIe-AP interfaces, delivering multi-terabit-per-second aggregate bandwidth within the package. AMD says this architecture can help reduce latency, power consumption, development costs and design complexity, while also allowing proven silicon IP to be reused across different products and applications.

Versal RF devices combine RF data converters, dedicated DSP capabilities, AI Engines and programmable logic in a single adaptive SoC. With native UCIe connectivity, these devices can be paired with external specialised chiplets to create more application-specific computing platforms while retaining the flexibility of AMD's adaptive architecture.

AMD's move also highlights the increasing importance of chiplet connectivity as AI, communications and high-performance computing systems become more specialised. Rather than building every function into one large die, manufacturers can use chiplets to tailor processing, connectivity and acceleration capabilities to individual applications. UCIe provides a standardised approach for connecting these components within advanced packages.

The company expects production chiplets supporting the new Versal RF UCIe architecture to become available in the fourth quarter of 2027, with additional AMD adaptive SoCs expected to gain UCIe support as the chiplet ecosystem develops.

Overall, AMD's adoption of UCIe 1.1 strengthens the Versal platform's position for heterogeneous computing and gives developers a more scalable route to building next-generation AI, RF, networking and communications systems around specialised chiplets.